Микроконтроллер
фирмы Analog Devices ADuC812
Part #
|
Core 8051
|
Special Function
|
ROM,
Byte
|
RAM,
Byte
|
I/O Pins
|
External Memory
Space
|
Speed,
MHz
|
Timer/
Counter
|
Int
|
Serial I/O
|
ADuC812
|
8K Flash
|
256
640Flash
|
32
|
64K Program
1M Data
|
12
|
3+WDT
|
8
|
UART,
I2C,
SPI
|
8xADC12, 2xDAC12,
40 ppm/°C Voltage Reference,
High Speed 200 kSPS,
DMA Controller for ADC to RAM Capture,
On-Chip Temperature Sensor,
Idle and Power-Down Modes,
Power Supply Monitor
|
|
Периферийный
микроконтроллер P-51 фирмы Cybernetic Micro Systems
Cybernetic Micro
Systems Peripheral 8051 System on a Chip
|
The P-51 "Peripheral 8051" is a new concept: An
8051 with built-in (E)ISA or PC-104 interface and supporting
subsystems. These include downloadable Code RAM, dual port RAM, and all
eleven IRQs to the host. Unlike classical 8051s, the P-51 naturally and
easily interfaces to a host through simple standard buses, and its
microsecond timing can provide real-time response to Windows
applications.
P-51
Features
|
All 8051/52 resources:
|
EISA/PC-104 interface:
|
Special Features:
|
- 8K bytes
downloadable Code RAM
- 256 bytes
internal Data RAM
- Timers 0, 1,
and 2
- Ports 0, 1,
2, and 3
- All 8051
instructions
- All
8051-equivalent Pins
- Download
Code RAM while reset
- Execute Code
when released
|
- 45 EISA
signals supported
- Uses one of
11 IRQ pins
- Software
selectable IRQ 3-15
- 20 ISA
Address pins
- 8 ISA Data
Bus pins
- Hardware or
software Reset
- Select
Segment Addr 0 and A400 to EC00
- Uses 16K
bytes of system memory space,
normally in an Upper Memory Block
|
- 4K-byte dual
port RAM shared by host and P-51
- Dual Data
Pointer
- Square Root
function
- Debug
capability
- Breakpoint
and single-step
- Software
interrupt generation
- 3.3v 100-pin
QFP
- 5v I/O
tolerant
- 51 MHz
operation
|
|